Dong Du

Email: dd_nirvana@sjtu.edu.cn

I am an Assistant Professor in the Institute of parallel and distributed systems (IPADS), Shanghai Jiao Tong University. My research interests include operating systems, architecture, system security (TEE), serverless computing and HW/SW co-design. I have built several systems including Penglai TEE (state-of-the-art RISC-V TEE), serverless systems (Catalyzer, ServerlessBench, and Molecule), and RISC-V IPC extension (XPC). I am also working on open-sourced communities, including RISC-V (SPMP TG chair), openEuler (RISC-V SIG maintainer) and OpenHarmony (RISC-V and TEE SIG maintainer).

Services: SOSP’23 AEC co-chair, MICRO’22 ERC, SOCC’22 TPC

news

Aug 2, 2023	One paper is accepted in MICRO 2023, about a new hardware-software co-design for CVM-based TEE with permission table. Based on Penglai RISC-V TEE.
Mar 11, 2023	I am co-chairing SOSP’23 Artifact Evaluation Committee (AEC). Please let me know (through email) if you have interests to join us.
Jan 31, 2023	I got the Honorable Mentions for the 2022 ACM China Doctoral Dissertation Award.
Oct 19, 2022	We have one paper published in HPCA 2023, about Efficient Distributed Secure Memory with a new merkle tree structure, based on open-sourced Penglai RISC-V TEE.
Sep 23, 2022	I was fortunate to receive The ACM Chinasys Doctoral Dissertation Award (2022). Many thanks to my advisor - Binyu Zang, Yubin Xia and Haibo Chen - and all my collaborators!
Aug 31, 2022	I started as an assistant professor at Shanghai Jiao Tong University.
Jun 1, 2022	I successfully defend my Ph.D thesis!

selected publications

ASPLOS
Serverless Computing on Heterogeneous Computers

Dong Du, Qingyuan Liu, Xueqiang Jiang, and 3 more authors

In Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems 2022

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Existing serverless computing platforms are built upon homogeneous computers, limiting the function density and restricting serverless computing to limited scenarios. We introduce Molecule, the first serverless computing system utilizing heterogeneous computers. Molecule enables both general-purpose devices (e.g., Nvidia DPU) and domain-specific accelerators (e.g., FPGA and GPU) for serverless applications that significantly improve function density (50% higher) and application performance (up to 34.6x). To achieve these results, we first propose XPU-Shim, a distributed shim to bridge the gap between underlying multi-OS systems (when using general-purpose devices) and our serverless runtime (i.e., Molecule). We further introduce vectorized sandbox, a sandbox abstraction to abstract hardware heterogeneity (when using domain-specific accelerators). Moreover, we also review state-of-the-art serverless optimizations on startup and communication latency and overcome the challenges to implement them on heterogeneous computers. We have implemented Molecule on real platforms with Nvidia DPUs and Xilinx FPGAs and evaluate it using benchmarks and real-world applications.
@inproceedings{10.1145/3503222.3507732, author = {Du, Dong and Liu, Qingyuan and Jiang, Xueqiang and Xia, Yubin and Zang, Binyu and Chen, Haibo}, title = {Serverless Computing on Heterogeneous Computers}, year = {2022}, isbn = {9781450392051}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3503222.3507732}, doi = {10.1145/3503222.3507732}, booktitle = {Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems}, pages = {797–813}, numpages = {17}, keywords = {function-as-a-service, serverless computing, heterogeneous computers, operating system, Cloud computing}, location = {Lausanne, Switzerland}, series = {ASPLOS 2022} }

OSDI

Scalable Memory Protection in the PENGLAI Enclave

Erhu Feng, Xu Lu, Dong Du, and 5 more authors

In 15th USENIX Symposium on Operating Systems Design and Implementation (OSDI 21) Jul 2021

Bib

@inproceedings{273705,
  author = {Feng, Erhu and Lu, Xu and Du, Dong and Yang, Bicheng and Jiang, Xueqiang and Xia, Yubin and Zang, Binyu and Chen, Haibo},
  title = {Scalable Memory Protection in the {PENGLAI} Enclave},
  booktitle = {15th {USENIX} Symposium on Operating Systems Design and Implementation ({OSDI} 21)},
  year = {2021},
  isbn = {978-1-939133-22-9},
  pages = {275--294},
  url = {https://www.usenix.org/conference/osdi21/presentation/feng},
  publisher = {{USENIX} Association},
  month = jul
}

ASPLOS
Catalyzer: Sub-Millisecond Startup for Serverless Computing with Initialization-Less Booting

Dong Du, Tianyi Yu, Yubin Xia, and 5 more authors

In Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems Jul 2020

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Serverless computing promises cost-efficiency and elasticity for high-productive software development. To achieve this, the serverless sandbox system must address two challenges: strong isolation between function instances, and low startup latency to ensure user experience. While strong isolation can be provided by virtualization-based sandboxes, the initialization of sandbox and application causes non-negligible startup overhead. Conventional sandbox systems fall short in low-latency startup due to their application-agnostic nature: they can only reduce the latency of sandbox initialization through hypervisor and guest kernel customization, which is inadequate and does not mitigate the majority of startup overhead.This paper proposes Catalyzer, a serverless sandbox system design providing both strong isolation and extremely fast function startup. Instead of booting from scratch, Catalyzer restores a virtualization-based function instance from a well-formed checkpoint image and thereby skips the initialization on the critical path (init-less). Catalyzer boosts the restore performance by on-demand recovering both user-level memory state and system state. We also propose a new OS primitive, sfork (sandbox fork), to further reduce the startup latency by directly reusing the state of a running sandbox instance. Fundamentally, Catalyzer removes the initialization cost by reusing state, which enables general optimizations for diverse serverless functions. The evaluation shows that Catalyzer reduces startup latency by orders of magnitude, achieves < 1ms latency in the best case, and significantly reduces the end-to-end latency for real-world workloads. Catalyzer has been adopted by Ant Financial, and we also present lessons learned from industrial development.
@inproceedings{10.1145/3373376.3378512, author = {Du, Dong and Yu, Tianyi and Xia, Yubin and Zang, Binyu and Yan, Guanglu and Qin, Chenggang and Wu, Qixuan and Chen, Haibo}, title = {Catalyzer: Sub-Millisecond Startup for Serverless Computing with Initialization-Less Booting}, year = {2020}, isbn = {9781450371025}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3373376.3378512}, doi = {10.1145/3373376.3378512}, booktitle = {Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems}, pages = {467–481}, numpages = {15}, keywords = {startup latency, serverless computing, checkpoint and restore, operating system}, location = {Lausanne, Switzerland}, series = {ASPLOS '20} }
ACM SoCC
Characterizing Serverless Platforms with Serverlessbench

Tianyi Yu, Qingyuan Liu, Dong Du, and 6 more authors

In Proceedings of the 11th ACM Symposium on Cloud Computing Jul 2020

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Serverless computing promises auto-scalability and cost-efficiency (in "pay-as-you-go" manner) for high-productive software development. Because of its virtue, serverless computing has motivated increasingly new applications and services in the cloud. This, however, also presents new challenges including how to efficiently design high-performance serverless platforms and how to efficiently program on the platforms.This paper proposes ServerlessBench, an open-source benchmark suite for characterizing serverless platforms. It includes test cases exploring characteristic metrics of serverless computing, e.g., communication efficiency, startup latency, stateless overhead, and performance isolation. We have applied the benchmark suite to evaluate the most popular serverless computing platforms, including AWS Lambda, Open-Whisk, and Fn, and present new serverless implications from the study. For example, we show scenarios where decoupling an application into a composition of serverless functions can be beneficial in cost-saving and performance, and that the "stateless" property in serverless computing can hurt the execution performance of serverless functions. These implications form several design guidelines, which may help platform designers to optimize serverless platforms and application developers to design their functions best fit to the platforms.
@inproceedings{10.1145/3419111.3421280, author = {Yu, Tianyi and Liu, Qingyuan and Du, Dong and Xia, Yubin and Zang, Binyu and Lu, Ziqian and Yang, Pingchao and Qin, Chenggang and Chen, Haibo}, title = {Characterizing Serverless Platforms with Serverlessbench}, year = {2020}, isbn = {9781450381376}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3419111.3421280}, doi = {10.1145/3419111.3421280}, booktitle = {Proceedings of the 11th ACM Symposium on Cloud Computing}, pages = {30–44}, numpages = {15}, location = {Virtual Event, USA}, series = {SoCC '20} }
ISCA
XPC: Architectural Support for Secure and Efficient Cross Process Call

Dong Du, Zhichao Hua, Yubin Xia, and 2 more authors

In Proceedings of the 46th International Symposium on Computer Architecture Jul 2019

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Microkernel has many intriguing features like security, fault-tolerance, modularity and customizability, which recently stimulate a resurgent interest in both academia and industry (including seL4, QNX and Google’s Fuchsia OS). However, IPC (inter-process communication), which is known as the Achilles’ Heel of microkernels, is still the major factor for the overall (poor) OS performance. Besides, IPC also plays a vital role in monolithic kernels like Android Linux, as mobile applications frequently communicate with plenty of user-level services through IPC. Previous software optimizations of IPC usually cannot bypass the kernel which is responsible for domain switching and message copying/remapping; hardware solutions like tagged memory or capability replace page tables for isolation, but usually require non-trivial modification to existing software stack to adapt the new hardware primitives. In this paper, we propose a hardware-assisted OS primitive, XPC (Cross Process Call), for fast and secure synchronous IPC. XPC enables direct switch between IPC caller and callee without trapping into the kernel, and supports message passing across multiple processes through the invocation chain without copying. The primitive is compatible with the traditional address space based isolation mechanism and can be easily integrated into existing microkernels and monolithic kernels. We have implemented a prototype of XPC based on a Rocket RISC-V core with FPGA boards and ported two microkernel implementations, seL4 and Zircon, and one monolithic kernel implementation, Android Binder, for evaluation. We also implement XPC on GEM5 simulator to validate the generality. The result shows that XPC can reduce IPC call latency from 664 to 21 cycles, up to 54.2x improvement on Android Binder, and improve the performance of real-world applications on microkernels by 1.6x on Sqlite3 and 10x on an HTTP server with minimal hardware resource cost.
@inproceedings{10.1145/3307650.3322218, author = {Du, Dong and Hua, Zhichao and Xia, Yubin and Zang, Binyu and Chen, Haibo}, title = {XPC: Architectural Support for Secure and Efficient Cross Process Call}, year = {2019}, isbn = {9781450366694}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3307650.3322218}, doi = {10.1145/3307650.3322218}, booktitle = {Proceedings of the 46th International Symposium on Computer Architecture}, pages = {671–684}, numpages = {14}, keywords = {microkernel, operating system, accelerators, inter-process communication}, location = {Phoenix, Arizona}, series = {ISCA '19} }