Dong Du

dd_nirvana@sjtu.edu.cn

I am an Associate Professor in the Institute of Parallel and Distributed Systems (IPADS), Shanghai Jiao Tong University. My current research focuses on AI/Agentic Operating Systems: building operating systems for AI agents and exploring how agents can reshape OS design. My research spans four directions:

Agent sandbox: DeltaBox and DeltaBox Lite.
Agent memory: memory abstractions and management for AI agents.
Agentic kernel: bringing agent capabilities into OS kernels.
Generative OS: generating OS components from specifications, including SpecFS/SYSSPEC (FAST 2026).

My past work includes serverless computing (Catalyzer, ServerlessBench, and Molecule), trusted execution environments (Penglai TEE), and hardware/software co-design (the RISC-V XPC extension).

I am also working on open-sourced communities, including RISC-V (SPMP TG chair), openEuler (RISC-V SIG maintainer) and OpenHarmony (RISC-V and TEE SIG maintainer).

Services (Program Committee): HPCA 2027 TPC, SOSP’26 TPC, SoCC’26 TPC, HPCA’26 TPC, USENIX FAST’26 TPC, ASPLOS 2026 ERC, MICRO 2025 TPC, ISCA 2025 TPC, USENIX NSDI’25 TPC, ACM CCS’24 TPC, ACSAC’24 TPC, ChinaSys’24 TPC, ACM SoCC’22 TPC, MICRO’22 ERC

Services (Organizing Committee): 1st Agentic OS Workshop (co-located with ASPLOS 2026), 2nd Agentic OS Workshop (co-located with SOSP 2026), SOSP’23 AEC Co-Chair, ASPLOS’24 Workshop (titled: OpenHarmony Tutorial) Co-Chair, APSys 2024 Publicity Co-Chair, ACM SIGOPS Blog Editor

Internship Opportunities I am seeking self-motivated students to join research on AI/Agentic Operating Systems, including agent sandboxes, agent memory, agentic kernels, and generative OSes. If you are interested, feel free to email me. I am also open to hearing other thoughts or ideas you might have!

news

Oct 16, 2026	We have open-sourced DeltaBox Lite, a lightweight file sandbox for AI agents with diff, commit, and abort support. Congratulations to Jingkai He, Shiqi Liu, Puxi, and the team! GitHub · Project · Introduction (中文).
Sep 22, 2026	Our paper DeltaBox: Millisecond-Scale Sandbox Checkpoint and Rollback for Stateful AI Agents has been accepted at ACM ATC 2026. Congratulations to Yunpeng and the team! Conference program.
Jul 08, 2026	Our paper Taming Dynamism on GPUs: Cross-SM Kernel Fusion via SM Cooperation and Just-in-Time Reduction (MeldKernel) has been accepted at SOSP 2026. Congratulations to Jingkai, Guangda, Tianjian, and the team! Paper.
Mar 29, 2026	One paper is accepted by ISCA 2026 (title: “CHIME: A Case for Efficient Long-Context Attention-FC Disaggregated Inference with DIMM-PIM”). Congratulations to Qingyuan, Liyan, Haocheng and Yanning!
Mar 28, 2026	Three papers are accepted by OSDI 2026 (title: “Virtualizing eBPF with Late-Binding”, “Disentangling Graph Dependencies for Efficient Billion-Scale GPU Vector Search”, and “Stop Pretending to be Busy: A Case for Serverless Paradigms in Co-located Batch Workloads”). Congratulations to Jing Zhang, Haoru and Jingkai, and Xiaohu!
Feb 27, 2026	Our work, SpecFS (title: “Sharpen the Spec, Cut the Code: A Case for Generative File System with SYSSPEC”), got the Best Paper Award and Distinguished Artifact Award of FAST 2026. Congratulations to all!
Jan 21, 2026	One paper is accepted by ASPLOS 2026 (title: “History Doesn’t Repeat Itself but Rollouts Rhyme: Accelerating Reinforcement Learning with RhymeRL”). Congratulations to Jingkai!
Dec 26, 2025	One paper is accepted by FAST 2026 (title: “Sharpen the Spec, Cut the Code: A Case for Generative File System with SYSSPEC”). Congratulation to Qingyuan, Mo, and Hengbin!

selected publications

ATC

DeltaBox: Millisecond-Scale Sandbox Checkpoint and Rollback for Stateful AI Agents

Yunpeng Dong, Jingkai He, Shiqi Liu, Yuze Hou, Dong Du, Zhonghu Xu, Si Yu, Baochuan Yang, Yubin Xia, and Haibo Chen

In 2026 ACM SIGOPS Annual Technical Conference (ATC 26), Nov 2026

Accepted; publication details forthcoming

Bib HTML

@inproceedings{dong2026deltabox,
  author = {Dong, Yunpeng and He, Jingkai and Liu, Shiqi and Hou, Yuze and Du, Dong and Xu, Zhonghu and Yu, Si and Yang, Baochuan and Xia, Yubin and Chen, Haibo},
  title = {{DeltaBox}: Millisecond-Scale Sandbox Checkpoint and Rollback for Stateful {AI} Agents},
  booktitle = {2026 ACM SIGOPS Annual Technical Conference (ATC 26)},
  year = {2026},
  month = nov,
  publisher = {Association for Computing Machinery},
  url = {https://sigops.org/s/conferences/atc/2026/schedule.html},
  note = {Accepted; publication details forthcoming}
}

SOSP

Taming Dynamism on GPUs: Cross-SM Kernel Fusion via SM Cooperation and Just-in-Time Reduction

Jingkai He, Guangda Sun, TianJian Li, Dong Du, Yubin Xia, and Haibo Chen

In Proceedings of the ACM SIGOPS 32nd Symposium on Operating Systems Principles, Sep 2026

DOI Bib HTML

@inproceedings{10.1145/3830418.3843857,
  series = {SOSP '26},
  title = {Taming Dynamism on GPUs: Cross-SM Kernel Fusion via SM Cooperation and Just-in-Time Reduction},
  url = {https://doi.org/10.1145/3830418.3843857},
  doi = {10.1145/3830418.3843857},
  booktitle = {Proceedings of the ACM SIGOPS 32nd Symposium on Operating Systems Principles},
  publisher = {ACM},
  author = {He, Jingkai and Sun, Guangda and Li, TianJian and Du, Dong and Xia, Yubin and Chen, Haibo},
  year = {2026},
  month = sep,
  pages = {1070--1090}
}

OSDI

Virtualizing eBPF with Late-Binding

Jing Zhang, Xiaguannan Song, Dong Du, Yubin Xia, Binyu Zang, and Haibo Chen

In 20th USENIX Symposium on Operating Systems Design and Implementation (OSDI 26), Jul 2026

Bib HTML

@inproceedings{318606,
  author = {Zhang, Jing and Song, Xiaguannan and Du, Dong and Xia, Yubin and Zang, Binyu and Chen, Haibo},
  title = {Virtualizing {eBPF} with {Late-Binding}},
  booktitle = {20th USENIX Symposium on Operating Systems Design and Implementation (OSDI 26)},
  year = {2026},
  isbn = {978-1-939133-55-7},
  address = {Seattle, WA},
  pages = {2127--2148},
  url = {https://www.usenix.org/conference/osdi26/presentation/zhang-jing},
  publisher = {USENIX Association},
  month = jul
}

OSDI

Disentangling Graph Dependencies for Efficient Billion-Scale GPU Vector Search

Haoru Zhao, Jingkai He, Jingyao Zeng, Mingkai Dong, and Dong Du

In 20th USENIX Symposium on Operating Systems Design and Implementation (OSDI 26), Jul 2026

Bib HTML

@inproceedings{318547,
  author = {Zhao, Haoru and He, Jingkai and Zeng, Jingyao and Dong, Mingkai and Du, Dong},
  title = {Disentangling Graph Dependencies for Efficient {Billion-Scale} {GPU} Vector Search},
  booktitle = {20th USENIX Symposium on Operating Systems Design and Implementation (OSDI 26)},
  year = {2026},
  isbn = {978-1-939133-55-7},
  address = {Seattle, WA},
  pages = {1563--1584},
  url = {https://www.usenix.org/conference/osdi26/presentation/zhao},
  publisher = {USENIX Association},
  month = jul
}

OSDI

Stop Pretending to Be Busy: A Case for Serverless Paradigms in Co-Located Batch Workloads (Operational Systems)

Xiaohu Chai, Jianfeng Tan, Congsi Yuan, Bowen Yang, Hao Dai, Tongkai Yang, Chao Huang, Dong Du, and Yu Chen

In 20th USENIX Symposium on Operating Systems Design and Implementation (OSDI 26), Jul 2026

Bib HTML

@inproceedings{318591,
  author = {Chai, Xiaohu and Tan, Jianfeng and Yuan, Congsi and Yang, Bowen and Dai, Hao and Yang, Tongkai and Huang, Chao and Du, Dong and Chen, Yu},
  title = {Stop Pretending to Be Busy: A Case for Serverless Paradigms in {Co-Located} Batch Workloads (Operational Systems)},
  booktitle = {20th USENIX Symposium on Operating Systems Design and Implementation (OSDI 26)},
  year = {2026},
  isbn = {978-1-939133-55-7},
  address = {Seattle, WA},
  pages = {1967--1988},
  url = {https://www.usenix.org/conference/osdi26/presentation/chai},
  publisher = {USENIX Association},
  month = jul
}

ISCA

CHIME: A Case for Efficient Long-Context Attention-FC Disaggregated Inference with DIMM-PIM

Qingyuan Liu, Liyan Chen, Haocheng Wang, Yanning Yang, Dong Du, Zhigang Mao, Naifeng Jing, Yubin Xia, and Haibo Chen

In 2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA), Jun 2026

DOI Bib HTML

@inproceedings{10.1109/ISCA66397.2026.00056,
  title = {CHIME: A Case for Efficient Long-Context Attention-FC Disaggregated Inference with DIMM-PIM},
  url = {https://doi.org/10.1109/ISCA66397.2026.00056},
  doi = {10.1109/isca66397.2026.00056},
  booktitle = {2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA)},
  publisher = {IEEE},
  author = {Liu, Qingyuan and Chen, Liyan and Wang, Haocheng and Yang, Yanning and Du, Dong and Mao, Zhigang and Jing, Naifeng and Xia, Yubin and Chen, Haibo},
  year = {2026},
  month = jun,
  pages = {1--17}
}

FAST

Sharpen the Spec, Cut the Code: A Case for Generative File System with SYSSPEC

Qingyuan Liu, Mo Zou, Hengbin Zhang, Dong Du, Yubin Xia, and Haibo Chen

In 24th USENIX Conference on File and Storage Technologies (FAST 26). Corresponding author: Dong Du. , Feb 2026

Best Paper + Distinguished Artifact Bib HTML

Best Paper Award and Distinguished Artifact Award, FAST 2026

@inproceedings{315951,
  author = {Liu, Qingyuan and Zou, Mo and Zhang, Hengbin and Du, Dong and Xia, Yubin and Chen, Haibo},
  title = {Sharpen the Spec, Cut the Code: A Case for Generative File System with {SYSSPEC}},
  booktitle = {24th USENIX Conference on File and Storage Technologies (FAST 26)},
  year = {2026},
  isbn = {978-1-939133-53-3},
  address = {Santa Clara, CA},
  pages = {291--311},
  url = {https://www.usenix.org/conference/fast26/presentation/liu-qingyuan},
  publisher = {USENIX Association},
  month = feb
}

ASPLOS

History Doesn’t Repeat Itself but Rollouts Rhyme: Accelerating Reinforcement Learning with RhymeRL

Jingkai He, Tianjian Li, Erhu Feng, Dong Du, Qian Liu, Tao Liu, Yubin Xia, and Haibo Chen

In Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, USA. Corresponding author: Dong Du. , 2026

DOI Bib

@inproceedings{10.1145/3779212.3790172,
  author = {He, Jingkai and Li, Tianjian and Feng, Erhu and Du, Dong and Liu, Qian and Liu, Tao and Xia, Yubin and Chen, Haibo},
  title = {History Doesn't Repeat Itself but Rollouts Rhyme: Accelerating Reinforcement Learning with RhymeRL},
  year = {2026},
  isbn = {9798400723599},
  publisher = {Association for Computing Machinery},
  address = {New York, NY, USA},
  url = {https://doi.org/10.1145/3779212.3790172},
  doi = {10.1145/3779212.3790172},
  booktitle = {Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2},
  pages = {929–945},
  numpages = {17},
  keywords = {large language models, reinforcement learning},
  location = {USA},
  series = {ASPLOS '26}
}

SOSP

How to Copy Memory? Coordinated Asynchronous Copy as a First-Class OS Service

Jingkai He, Yunpeng Dong, Dong Du, Mo Zou, Zhitai Yu, Yuxin Ren, Ning Jia, Yubin Xia, and Haibo Chen

In Proceedings of the ACM SIGOPS 31st Symposium on Operating Systems Principles, Lotte Hotel World, Seoul, Republic of Korea. Corresponding author: Dong Du. , 2025

Best Paper DOI Bib

Best Paper Award, SOSP 2025

@inproceedings{10.1145/3731569.3764800,
  author = {He, Jingkai and Dong, Yunpeng and Du, Dong and Zou, Mo and Yu, Zhitai and Ren, Yuxin and Jia, Ning and Xia, Yubin and Chen, Haibo},
  title = {How to Copy Memory? Coordinated Asynchronous Copy as a First-Class OS Service},
  year = {2025},
  isbn = {9798400718700},
  publisher = {Association for Computing Machinery},
  address = {New York, NY, USA},
  url = {https://doi.org/10.1145/3731569.3764800},
  doi = {10.1145/3731569.3764800},
  booktitle = {Proceedings of the ACM SIGOPS 31st Symposium on Operating Systems Principles},
  pages = {1062–1081},
  numpages = {20},
  keywords = {memory copy, asynchronous copy, OS service},
  location = {Lotte Hotel World, Seoul, Republic of Korea},
  series = {SOSP '25}
}

OSDI

Fork in the Road: Reflections and Optimizations for Cold Start Latency in Production Serverless Systems

Xiaohu Chai, Tianyu Zhou, Keyang Hu, Jianfeng Tan, Tiwei Bie, Anqi Shen, Dawei Shen, Qi Xing, Shun Song, Tongkai Yang, Le Gao, Feng Yu, Zhengyu He, Dong Du, Yubin Xia, Kang Chen, and Yu Chen

In 19th USENIX Symposium on Operating Systems Design and Implementation (OSDI 25). Corresponding author: Dong Du. , 2025

Bib HTML

@inproceedings{chai2025fork,
  url = {https://www.usenix.org/conference/osdi25/presentation/chai-xiaohu},
  title = {Fork in the Road: Reflections and Optimizations for Cold Start Latency in Production Serverless Systems},
  author = {Chai, Xiaohu and Zhou, Tianyu and Hu, Keyang and Tan, Jianfeng and Bie, Tiwei and Shen, Anqi and Shen, Dawei and Xing, Qi and Song, Shun and Yang, Tongkai and Gao, Le and Yu, Feng and He, Zhengyu and Du, Dong and Xia, Yubin and Chen, Kang and Chen, Yu},
  booktitle = {19th USENIX Symposium on Operating Systems Design and Implementation (OSDI 25)},
  pages = {199--218},
  year = {2025}
}

OSDI

OS Rendering Service Made Parallel with Out-of-Order Execution and In-Order Commit

Yuanpei Wu, Dong Du, Chao Xu, Yubin Xia, Yang Yu, Ming Fu, Binyu Zang, and Haibo Chen

In 19th USENIX Symposium on Operating Systems Design and Implementation (OSDI 25). Corresponding author: Dong Du. , 2025

Bib HTML

@inproceedings{wu2025rendering,
  url = {https://www.usenix.org/conference/osdi25/presentation/wu-yuanpei},
  title = {{OS} Rendering Service Made Parallel with {Out-of-Order} Execution and {In-Order} Commit},
  author = {Wu, Yuanpei and Du, Dong and Xu, Chao and Xia, Yubin and Yu, Yang and Fu, Ming and Zang, Binyu and Chen, Haibo},
  booktitle = {19th USENIX Symposium on Operating Systems Design and Implementation (OSDI 25)},
  pages = {693--710},
  year = {2025}
}

ASPLOS
D-VSync: Decoupled Rendering and Displaying for Smartphone Graphics

Yuanpei Wu, Dong Du, Chao Xu, Yubin Xia, Ming Fu, Binyu Zang, and Haibo Chen

In Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1, Rotterdam, Netherlands. Corresponding author: Dong Du. , 2025

Abs DOI Bib

Rendering service, which typically orchestrates screen display and UI through Vertical Synchronization (VSync), is an indispensable system service for user experiences of smartphone OSes (e.g., Android, OpenHarmony, and iOS). The recent trend of large high-frame-rate screens, stunning visual effects, and physics-based animations has placed unprecedented pressure on the VSync-based rendering architecture, leading to higher frame drops and longer rendering latency.This paper proposes Decoupled Vertical Synchronization (D-VSync), which decouples execution and displaying in the rendering service. D-VSync allows frames to be rendered a number of VSync periods before being physically displayed on the screen. The key insight behind D-VSync to resolve the limitation of VSync is that, the decoupling enables sporadic long frames to utilize the computational power saved by common short frames, therefore providing a larger time window to tolerate workload fluctuations. Evaluation results of 75 common OS use cases and apps on OpenHarmony (Mate 40 Pro, Mate 60 Pro), 25 popular apps on Android (Google Pixel 5), and simulations of 15 mobile games show that compared to VSync, D-VSync on average reduces frame drops by 72.7%, user-perceptible stutters by 72.3%, and rendering latency by 31.1%, with only 0.13%-0.37% more power consumption. D-VSync has been integrated into HarmonyOS NEXT.
@inproceedings{10.1145/3669940.3707235, author = {Wu, Yuanpei and Du, Dong and Xu, Chao and Xia, Yubin and Fu, Ming and Zang, Binyu and Chen, Haibo}, title = {D-VSync: Decoupled Rendering and Displaying for Smartphone Graphics}, year = {2025}, isbn = {9798400706981}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3669940.3707235}, doi = {10.1145/3669940.3707235}, booktitle = {Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1}, pages = {326–341}, numpages = {16}, keywords = {graphics system, operating system, rendering service, vertical synchronization}, location = {Rotterdam, Netherlands}, series = {ASPLOS '25} }

ATC

Harmonizing Efficiency and Practicability: Optimizing Resource Utilization in Serverless Computing with Jiagu

Qingyuan Liu, Yanning Yang, Dong Du, Yubin Xia, Ping Zhang, Jia Feng, James R. Larus, and Haibo Chen

In 2024 USENIX Annual Technical Conference (USENIX ATC 24). Corresponding author: Dong Du. , Jul 2024

Bib

@inproceedings{298488,
  author = {Liu, Qingyuan and Yang, Yanning and Du, Dong and Xia, Yubin and Zhang, Ping and Feng, Jia and Larus, James R. and Chen, Haibo},
  title = {Harmonizing Efficiency and Practicability: Optimizing Resource Utilization in Serverless Computing with Jiagu},
  booktitle = {2024 USENIX Annual Technical Conference (USENIX ATC 24)},
  year = {2024},
  isbn = {978-1-939133-41-0},
  address = {Santa Clara, CA},
  pages = {1--17},
  url = {https://www.usenix.org/conference/atc24/presentation/liu-qingyuan},
  publisher = {USENIX Association},
  month = jul
}

SoCC
On-demand and Parallel Checkpoint/Restore for GPU Applications

Yanning Yang, Dong Du, Haitao Song, and Yubin Xia

In Proceedings of the 2024 ACM Symposium on Cloud Computing, Redmond, WA, USA. Corresponding author: Dong Du. , 2024

Abs DOI Bib

Leveraging serverless computing for cloud-based machine learning services is on the rise, promising cost-efficiency and flexibility are crucial for ML applications relying on high-performance GPUs and substantial memory. However, despite modern serverless platforms handling diverse devices like GPUs seamlessly on a pay-as-you-go basis, a longstanding challenge remains: startup latency, a well-studied issue when serverless is CPU-centric. For example, initializing GPU apps with minor GPU models, like MobileNet, demands several seconds. For more intricate models such as GPT-2, startup latency can escalate to around 10 seconds, vastly overshadowing the short computation time for GPU-based inference. Prior solutions tailored for CPU serverless setups, like fork() and Checkpoint/Restore, cannot be directly and effectively applied due to differences between CPUs and GPUs.This paper presents gCROP (GPU Checkpoint/Restore made On-demand and Parallel), the first GPU runtime that achieves <100ms startup latency for GPU apps with up to 774 million parameters (3.1GB GPT-2-Large model). The key insight behind gCROP is to selectively restore essential states on demand and in parallel during boot from a prepared checkpoint image. To this end, gCROP first introduces a global service, GPU Restore Server, which can break the existing barrier between restore stages and achieve parallel restore. Besides, gCROP leverages both CPU and GPU page faults, and can on-demand restore both CPU and GPU data with profile-guided order to mitigate costs caused by faults. Moreover, gCROP designs a multi-checkpoint mechanism to increase the common contents among checkpoint images and utilizes deduplication to reduce storage costs. Implementation and evaluations on AMD GPUs show significant improvement in startup latency, 6.4x-24.7x compared with booting from scratch and 3.9x-23.5x over the state-of-the-art method (CRIU).
@inproceedings{10.1145/3698038.3698510, author = {Yang, Yanning and Du, Dong and Song, Haitao and Xia, Yubin}, title = {On-demand and Parallel Checkpoint/Restore for GPU Applications}, year = {2024}, isbn = {9798400712869}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3698038.3698510}, doi = {10.1145/3698038.3698510}, booktitle = {Proceedings of the 2024 ACM Symposium on Cloud Computing}, pages = {415–433}, numpages = {19}, keywords = {Checkpoint and Restore, Cloud Computing, GPUs, Startup Latency}, location = {Redmond, WA, USA}, series = {SoCC '24} }

ISCA

sNPU: Trusted Execution Environments on Integrated NPUs

Erhu Feng, Dahu Feng, Dong Du, Yubin Xia, and Haibo Chen

In 51st ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2024, Buenos Aires, Argentina, June 29 - July 3, 2024. Corresponding author: Dong Du. , 2024

DOI Bib

@inproceedings{DBLP:conf/isca/FengFDXC24,
  author = {Feng, Erhu and Feng, Dahu and Du, Dong and Xia, Yubin and Chen, Haibo},
  title = {sNPU: Trusted Execution Environments on Integrated NPUs},
  booktitle = {51st {ACM/IEEE} Annual International Symposium on Computer Architecture,
  		{ISCA} 2024, Buenos Aires, Argentina, June 29 - July 3, 2024},
  pages = {708--723},
  publisher = {{IEEE}},
  year = {2024},
  url = {https://doi.org/10.1109/ISCA59077.2024.00057},
  doi = {10.1109/ISCA59077.2024.00057},
  timestamp = {Fri, 16 Aug 2024 20:48:15 +0200},
  biburl = {https://dblp.org/rec/conf/isca/FengFDXC24.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

ASPLOS
sIOPMP: Scalable and Efficient I/O Protection for TEEs

Erhu Feng, Dahu Feng, Dong Du, Yubin Xia, Wenbin Zheng, Siqi Zhao, and Haibo Chen

In Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, , La Jolla, CA, USA, . Corresponding author: Dong Du. , 2024

Abs DOI Bib

Trusted Execution Environments (TEEs), like Intel SGX/TDX, AMD SEV-SNP, ARM TrustZone/CCA, have been widely adopted in prevailing architectures. However, these TEEs typically do not consider I/O isolation (e.g., defending against malicious DMA requests) as a first-class citizen, which may degrade the I/O performance. Traditional methods like using IOMMU or software I/O can degrade throughput by at least 20% for I/O intensive workloads. The main reason is that the isolation requirements for I/O devices differ from CPU ones. This paper proposes a novel I/O isolation mechanism for TEEs, named sIOPMP (scalable I/O Physical Memory Protection), with three key features. First, we design a Multi-stage-Tree-based checker, supporting more than 1,000 hardware regions. Second, we classify the devices into hot and cold, and support unlimited devices with the mountable entry. Third, we propose a remapping mechanism to switch devices between hot and cold status for dynamic I/O workloads. Evaluation results show that sIOPMP introduces only negligible performance overhead for both benchmarks and real-world workloads, and improves 20% 38% network throughput compared with IOMMU-based mechanisms or software I/O adopted in TEEs.
@inproceedings{10.1145/3620665.3640378, author = {Feng, Erhu and Feng, Dahu and Du, Dong and Xia, Yubin and Zheng, Wenbin and Zhao, Siqi and Chen, Haibo}, title = {sIOPMP: Scalable and Efficient I/O Protection for TEEs}, year = {2024}, isbn = {9798400703850}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3620665.3640378}, doi = {10.1145/3620665.3640378}, booktitle = {Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2}, pages = {1061–1076}, numpages = {16}, location = {<conf-loc>, <city>La Jolla</city>, <state>CA</state>, <country>USA</country>, </conf-loc>}, series = {ASPLOS '24} }
MICRO
Accelerating Extra Dimensional Page Walks for Confidential Computing

Dong Du, Bicheng Yang, Yubin Xia, and Haibo Chen

In Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, , Toronto, ON, Canada, , 2023

Abs DOI Bib

To support highly scalable and fine-grained computing paradigms such as microservices and serverless computing better, modern hardware-assisted confidential computing systems, such as Intel TDX and ARM CCA, introduce permission table to achieve fine-grained and scalable memory isolation among different domains. However, it also adds an extra dimension to page walks besides page tables, leading to significantly more memory references (e.g., 4 → 12 for RISC-V Sv39)1. We observe that most costs (about 75%) caused by the extra dimension of page walks are used to validate page table pages. Based on this observation, this paper proposes HPMP (Hybrid Physical Memory Protection), a hardware-software co-design (on RISC-V) that protects page table pages using segment registers and normal pages using permission tables to balance scalability and performance. We have implemented HPMP and Penglai-HPMP (a TEE system based on HPMP) on FPGA with two RISC-V cores (both in-order and out-of-order). Evaluation results show that HPMP can reduce costs by 23.1%–73.1% on BOOM and significantly improve performance on real-world applications, including serverless computing (FunctionBench) and Redis.
@inproceedings{10.1145/3613424.3614293, author = {Du, Dong and Yang, Bicheng and Xia, Yubin and Chen, Haibo}, title = {Accelerating Extra Dimensional Page Walks for Confidential Computing}, year = {2023}, isbn = {9798400703294}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3613424.3614293}, doi = {10.1145/3613424.3614293}, booktitle = {Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture}, pages = {654–669}, numpages = {16}, location = {<conf-loc>, <city>Toronto</city>, <state>ON</state>, <country>Canada</country>, </conf-loc>}, series = {MICRO '23} }

HPCA

Efficient Distributed Secure Memory with Migratable Merkle Tree

Erhu Feng, Dong Du, Yubin Xia, and Haibo Chen

In 2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA). Corresponding author: Dong Du. , 2023

DOI Bib

@inproceedings{10071130,
  author = {Feng, Erhu and Du, Dong and Xia, Yubin and Chen, Haibo},
  booktitle = {2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)},
  title = {Efficient Distributed Secure Memory with Migratable Merkle Tree},
  year = {2023},
  volume = {},
  number = {},
  pages = {347-360},
  doi = {10.1109/HPCA56546.2023.10071130}
}

ACM SoCC
The Gap Between Serverless Research and Real-World Systems

Qingyuan Liu, Dong Du, Yubin Xia, Ping Zhang, and Haibo Chen

In Proceedings of the 2023 ACM Symposium on Cloud Computing, Santa Cruz, CA, USA. Corresponding author: Dong Du. , 2023

Abs DOI Bib

With the emergence of the serverless computing paradigm in the cloud, researchers have explored many challenges of serverless systems and proposed solutions such as snapshot-based booting. However, we have noticed that some of these optimizations are based on oversimplified assumptions that lead to infeasibility and hide real-world issues. This paper aims to analyze the gap between current serverless research and real-world systems from a perspective of industry, and present new observations, challenges, opportunities, and insights that may address the discrepancies.
@inproceedings{10.1145/3620678.3624785, author = {Liu, Qingyuan and Du, Dong and Xia, Yubin and Zhang, Ping and Chen, Haibo}, title = {The Gap Between Serverless Research and Real-World Systems}, year = {2023}, isbn = {9798400703874}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3620678.3624785}, doi = {10.1145/3620678.3624785}, booktitle = {Proceedings of the 2023 ACM Symposium on Cloud Computing}, pages = {475–485}, numpages = {11}, keywords = {cloud computing, serverless, sidecar, scheduling}, location = {Santa Cruz, CA, USA}, series = {SoCC '23} }
ASPLOS
Serverless Computing on Heterogeneous Computers

Dong Du, Qingyuan Liu, Xueqiang Jiang, Yubin Xia, Binyu Zang, and Haibo Chen

In Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 2022

Abs DOI Bib

Existing serverless computing platforms are built upon homogeneous computers, limiting the function density and restricting serverless computing to limited scenarios. We introduce Molecule, the first serverless computing system utilizing heterogeneous computers. Molecule enables both general-purpose devices (e.g., Nvidia DPU) and domain-specific accelerators (e.g., FPGA and GPU) for serverless applications that significantly improve function density (50% higher) and application performance (up to 34.6x). To achieve these results, we first propose XPU-Shim, a distributed shim to bridge the gap between underlying multi-OS systems (when using general-purpose devices) and our serverless runtime (i.e., Molecule). We further introduce vectorized sandbox, a sandbox abstraction to abstract hardware heterogeneity (when using domain-specific accelerators). Moreover, we also review state-of-the-art serverless optimizations on startup and communication latency and overcome the challenges to implement them on heterogeneous computers. We have implemented Molecule on real platforms with Nvidia DPUs and Xilinx FPGAs and evaluate it using benchmarks and real-world applications.
@inproceedings{10.1145/3503222.3507732, author = {Du, Dong and Liu, Qingyuan and Jiang, Xueqiang and Xia, Yubin and Zang, Binyu and Chen, Haibo}, title = {Serverless Computing on Heterogeneous Computers}, year = {2022}, isbn = {9781450392051}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3503222.3507732}, doi = {10.1145/3503222.3507732}, booktitle = {Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems}, pages = {797–813}, numpages = {17}, keywords = {function-as-a-service, serverless computing, heterogeneous computers, operating system, Cloud computing}, location = {Lausanne, Switzerland}, series = {ASPLOS 2022} }

OSDI

Scalable Memory Protection in the PENGLAI Enclave

Erhu Feng, Xu Lu, Dong Du, Bicheng Yang, Xueqiang Jiang, Yubin Xia, Binyu Zang, and Haibo Chen

In 15th USENIX Symposium on Operating Systems Design and Implementation (OSDI 21), Jul 2021

Bib

@inproceedings{273705,
  author = {Feng, Erhu and Lu, Xu and Du, Dong and Yang, Bicheng and Jiang, Xueqiang and Xia, Yubin and Zang, Binyu and Chen, Haibo},
  title = {Scalable Memory Protection in the {PENGLAI} Enclave},
  booktitle = {15th {USENIX} Symposium on Operating Systems Design and Implementation ({OSDI} 21)},
  year = {2021},
  isbn = {978-1-939133-22-9},
  pages = {275--294},
  url = {https://www.usenix.org/conference/osdi21/presentation/feng},
  publisher = {{USENIX} Association},
  month = jul
}

ASPLOS
Catalyzer: Sub-Millisecond Startup for Serverless Computing with Initialization-Less Booting

Dong Du, Tianyi Yu, Yubin Xia, Binyu Zang, Guanglu Yan, Chenggang Qin, Qixuan Wu, and Haibo Chen

In Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 2020

Abs DOI Bib

Serverless computing promises cost-efficiency and elasticity for high-productive software development. To achieve this, the serverless sandbox system must address two challenges: strong isolation between function instances, and low startup latency to ensure user experience. While strong isolation can be provided by virtualization-based sandboxes, the initialization of sandbox and application causes non-negligible startup overhead. Conventional sandbox systems fall short in low-latency startup due to their application-agnostic nature: they can only reduce the latency of sandbox initialization through hypervisor and guest kernel customization, which is inadequate and does not mitigate the majority of startup overhead.This paper proposes Catalyzer, a serverless sandbox system design providing both strong isolation and extremely fast function startup. Instead of booting from scratch, Catalyzer restores a virtualization-based function instance from a well-formed checkpoint image and thereby skips the initialization on the critical path (init-less). Catalyzer boosts the restore performance by on-demand recovering both user-level memory state and system state. We also propose a new OS primitive, sfork (sandbox fork), to further reduce the startup latency by directly reusing the state of a running sandbox instance. Fundamentally, Catalyzer removes the initialization cost by reusing state, which enables general optimizations for diverse serverless functions. The evaluation shows that Catalyzer reduces startup latency by orders of magnitude, achieves < 1ms latency in the best case, and significantly reduces the end-to-end latency for real-world workloads. Catalyzer has been adopted by Ant Financial, and we also present lessons learned from industrial development.
@inproceedings{10.1145/3373376.3378512, author = {Du, Dong and Yu, Tianyi and Xia, Yubin and Zang, Binyu and Yan, Guanglu and Qin, Chenggang and Wu, Qixuan and Chen, Haibo}, title = {Catalyzer: Sub-Millisecond Startup for Serverless Computing with Initialization-Less Booting}, year = {2020}, isbn = {9781450371025}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3373376.3378512}, doi = {10.1145/3373376.3378512}, booktitle = {Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems}, pages = {467–481}, numpages = {15}, keywords = {startup latency, serverless computing, checkpoint and restore, operating system}, location = {Lausanne, Switzerland}, series = {ASPLOS '20} }
ACM SoCC
Characterizing Serverless Platforms with Serverlessbench

Tianyi Yu, Qingyuan Liu, Dong Du, Yubin Xia, Binyu Zang, Ziqian Lu, Pingchao Yang, Chenggang Qin, and Haibo Chen

In Proceedings of the 11th ACM Symposium on Cloud Computing, Virtual Event, USA, 2020

Abs DOI Bib

Serverless computing promises auto-scalability and cost-efficiency (in "pay-as-you-go" manner) for high-productive software development. Because of its virtue, serverless computing has motivated increasingly new applications and services in the cloud. This, however, also presents new challenges including how to efficiently design high-performance serverless platforms and how to efficiently program on the platforms.This paper proposes ServerlessBench, an open-source benchmark suite for characterizing serverless platforms. It includes test cases exploring characteristic metrics of serverless computing, e.g., communication efficiency, startup latency, stateless overhead, and performance isolation. We have applied the benchmark suite to evaluate the most popular serverless computing platforms, including AWS Lambda, Open-Whisk, and Fn, and present new serverless implications from the study. For example, we show scenarios where decoupling an application into a composition of serverless functions can be beneficial in cost-saving and performance, and that the "stateless" property in serverless computing can hurt the execution performance of serverless functions. These implications form several design guidelines, which may help platform designers to optimize serverless platforms and application developers to design their functions best fit to the platforms.
@inproceedings{10.1145/3419111.3421280, author = {Yu, Tianyi and Liu, Qingyuan and Du, Dong and Xia, Yubin and Zang, Binyu and Lu, Ziqian and Yang, Pingchao and Qin, Chenggang and Chen, Haibo}, title = {Characterizing Serverless Platforms with Serverlessbench}, year = {2020}, isbn = {9781450381376}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3419111.3421280}, doi = {10.1145/3419111.3421280}, booktitle = {Proceedings of the 11th ACM Symposium on Cloud Computing}, pages = {30–44}, numpages = {15}, location = {Virtual Event, USA}, series = {SoCC '20} }
ISCA
XPC: Architectural Support for Secure and Efficient Cross Process Call

Dong Du, Zhichao Hua, Yubin Xia, Binyu Zang, and Haibo Chen

In Proceedings of the 46th International Symposium on Computer Architecture, Phoenix, Arizona, 2019

Abs DOI Bib

Microkernel has many intriguing features like security, fault-tolerance, modularity and customizability, which recently stimulate a resurgent interest in both academia and industry (including seL4, QNX and Google’s Fuchsia OS). However, IPC (inter-process communication), which is known as the Achilles’ Heel of microkernels, is still the major factor for the overall (poor) OS performance. Besides, IPC also plays a vital role in monolithic kernels like Android Linux, as mobile applications frequently communicate with plenty of user-level services through IPC. Previous software optimizations of IPC usually cannot bypass the kernel which is responsible for domain switching and message copying/remapping; hardware solutions like tagged memory or capability replace page tables for isolation, but usually require non-trivial modification to existing software stack to adapt the new hardware primitives. In this paper, we propose a hardware-assisted OS primitive, XPC (Cross Process Call), for fast and secure synchronous IPC. XPC enables direct switch between IPC caller and callee without trapping into the kernel, and supports message passing across multiple processes through the invocation chain without copying. The primitive is compatible with the traditional address space based isolation mechanism and can be easily integrated into existing microkernels and monolithic kernels. We have implemented a prototype of XPC based on a Rocket RISC-V core with FPGA boards and ported two microkernel implementations, seL4 and Zircon, and one monolithic kernel implementation, Android Binder, for evaluation. We also implement XPC on GEM5 simulator to validate the generality. The result shows that XPC can reduce IPC call latency from 664 to 21 cycles, up to 54.2x improvement on Android Binder, and improve the performance of real-world applications on microkernels by 1.6x on Sqlite3 and 10x on an HTTP server with minimal hardware resource cost.
@inproceedings{10.1145/3307650.3322218, author = {Du, Dong and Hua, Zhichao and Xia, Yubin and Zang, Binyu and Chen, Haibo}, title = {XPC: Architectural Support for Secure and Efficient Cross Process Call}, year = {2019}, isbn = {9781450366694}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3307650.3322218}, doi = {10.1145/3307650.3322218}, booktitle = {Proceedings of the 46th International Symposium on Computer Architecture}, pages = {671–684}, numpages = {14}, keywords = {microkernel, operating system, accelerators, inter-process communication}, location = {Phoenix, Arizona}, series = {ISCA '19} }